Welcome! I’m an MIT sophomore studying Electrical Engineering & Computer Science (6-5) and Mathematics (18), minoring in Linguistics (24). I focus on programming languages and computer architecture, with interests in performance engineering, compilers, ML, and numerical methods. I especially like making Python eDSLs, and I’ve recently gotten slightly obsessed with Asahi Linux, Nix, and Apple silicon.
Outside of school I enjoy language learning, amateur radio, music, nature, and reading.
Projects
Hardware / Systems
- ParaDPLL - FPGA SAT Solver written in SystemVerilog for 6.205 final project.
- M1 Secret Extension Enabler - Kernel module that enables undocumented Apple Silicon ISA extensions on Linux, used for implementing Rosetta 2 fast userspace x86 emulation.
- Finesse - Python FSM eDSL and toolkit including visualzation, optimization, and SystemVerilog codegen (used to make ParaDPLL visualizations).
- TinyIR - Functional Python GPU IR, with JAX, Numpy, Torch.func, and other backends.
- Apple optimized FEX-Emu (Coming Soon) - Implementing some Rosetta 2 optimizations into FEX-Emu, using reverse engineered Apple silicon x86 emulation hardware support.
ML
Math
- Interval Arithmetic - Library for interval arithmetic (finding the ranges of functions), using custom Taylor series patchwork, arbitrary degree autodiff, compilation, efficient patch caching.
- Random Polynomial Toolkit - Framework for generating, analyzing, and visualizing random polynomial ensembles.
- High Dimensional Probability Primer - Primer on key high dimensional probability concepts, from MIT 2026 DRP talk.
- Dice DSL - DSL describing probabilistic game rules, automatically solving for optimal play, with efficient decision-tree codegen.
- Tie-Breaking and Rounding Overflow in Floating-Point Division - Proofs relating to floating point division rounding.
- Bit Hacks Verified (Coming Soon) - Formal verification of bit hacks and optimizations in Rocq.
Random